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1. (jCommunity Group) Tuesday, 31 December 2069 2. SystemC and Transaction-Level Modeling (TLM) (MyBlog/TB-Blog) ... as follows: Brian Bailey, Independent Consultant and an expert in Verification and ESL (Brian is also the leader of the Verification and ESL communities on www.TechBites.com). Frans Theeuwen, Program ... Monday, 21 December 2009 3. Formal is more than just alive and well. It is thriving! (MyBlog/TB-Articles) ... no longer just about the verification of RTL designs. It is spreading to higher levels of abstraction, which would fall into the ESL space and into software that would fall into the embedded space. This ... Friday, 12 February 2010 4. Hot News - Synopsys acquire CoWare! (MyBlog/TB-Blog) ... from our very own Brian Bailey in the TechBites ESL and Verification communities. ... Monday, 08 February 2010 5. Cadence, CoWare and Synopsys. Sorting out the investment. (MyBlog/TB-Blog) It was back in September 2003 when Cadence exited the ESL space. At that time Penny Herscher, then executive vice president and general manager at Cadence, said "From now on, if a Cadence customer asks ... Monday, 08 February 2010 6. Synopsys and CoWare tie the knot. Virtual Prototyping on fire!! (MyBlog/TB-Blog) ... Synopsys now has a major integration effort ahead of them in both the ESL space and the DSP tool space. --------------------------------------------- Brian Bailey – keeping you covered ... Monday, 08 February 2010 7. SystemC and TLM (Q&A #1) (MyBlog/TB-Blog) ... in place an ESL methodology. It is primarily used for creating an abstract model of the hardware intended either for high-level synthesis or as a reference model against which the design is to be compared. ... Monday, 21 December 2009 8. Welcome to TechBites (MyBlog/TB-Articles) ... of the ESL and Verification communities). What's the algorithm behind the Karma points? I don’t know. Trust me, I've tried to find out, but those who don the undergarments of authority and stride the ... Wednesday, 11 November 2009 9. Mentor embraces SystemC in their Catapult high-level synthesis solution (MyBlog/TB-Articles) ... surveys indicate that 80 percent of today’s SystemC users favor working on transactional models above the cycle accurate level, and today most ESL activities, such as architecture analysis and virtual ... Monday, 25 January 2010 10. Say goodbye to the 3 V’s of virtual prototyping (MyBlog/TB-Blog) ... suppliers has yet to show a presence in this market. It was only a few years back that Cadence turned some of their DSP and ESL software over to CoWare – maybe the time is getting right for them to take ... Friday, 05 February 2010 11. BDTi, Xilinx, AutoESL and Synfora dispel rumors about high-level synthesis (MyBlog/TB-Articles) ... good as the best RTL engineers? You can go to the HLS vendors (Cadence, Mentor, Synopsys, Forte, Synfora, AutoESL) and they will show you results that say they produce better results in a shorter period ... Monday, 18 January 2010 12. ESL Verification Languages. What will it be based on? (MyBlog/TB-Articles) ... if this is quickly rising as a popular RTL verification language, even though it appears to have had less success with adoption as a design language. Now, as we move to ESL, the market has responded quite ... Monday, 28 December 2009 13. SystemC and TLM (Q&A #2) (MyBlog/TB-Blog) ... is built. Reducing the RTL verification effort significantly by catching bugs earlier and faster Reducing the RTL verification effort by reusing ESL components in RTL testbench Laurent Ducousso (STMicroelectronics): ... Monday, 21 December 2009 14. Who is winning the emulation war? (MyBlog/TB-Blog) ... built into them, thus requiring far fewer iterations. So, at the end of the day, I have to wonder if the emulation market will grow or shrink. If ESL does take off and a lot of system-verification moves ... Tuesday, 27 October 2009 15. Mentor whitepaper reviewed: Boosting RTL Verification with High-Level Synthesis (MyBlog/TB-Blog) In a recent Mentor Graphics whitepaper titled “Boosting RTL Verification with High-Level Synthesis”, Shawn McCloud talks about how the use of high-level synthesis both directly and indirectly affects the ... Thursday, 17 December 2009 16. SystemC and TLM (Q&A #10) (MyBlog/TB-Blog) ... RTL, but also TLM and cycle accurate SystemC models to be used in subsequent ESL activities. Laurent Ducousso (STMicroelectronics): SystemC and TLM are promising, but there is still a long way to go. ... Monday, 04 January 2010 17. SystemC and TLM (Q&A #3) (MyBlog/TB-Blog) ... ESL components in RTL testbench Laurent Ducousso (STMicroelectronics): Early firmware and software development; validation of architecture concepts; providing a reference for verification, and horizontal ... Tuesday, 22 December 2009 18. Agilent Technologies’ Stereo Viewer Brings James Clerk Maxwell’s Famous Equations to Life (MyBlog/TB-Blog) ... Other ongoing projects include massively parallel EM, and circuit simulation that harness the massively parallel CUDA architecture of NVIDIA Tesla GPU computing solutions. Quad buffered stereo is enabled ... Tuesday, 15 December 2009 19. SystemC and TLM (Q&A #4) (MyBlog/TB-Blog) ... adopting it. That removes the biggest impediment to ESL adoption, which was the availability of models. No vendor could afford to produce all of the models necessary themselves. Steve Brown (Cadence): ... Tuesday, 22 December 2009 20. Patent Alert: ESL model creator (MyBlog/TB-Reviews) Every once in a while I find a patent that I believe may be of interest to people, either because it may relate to work that they are doing, or may influence the industry. This week one turned up in my ... Tuesday, 05 January 2010
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