1.
(jCommunity Group)

2. Processor Design: System-On-Chip Computing for ASICs and FPGAs
(MyBlog/TB-Reviews)

... can implement familiar architectures or novelties of their own. This collection of papers presents a survey of processor design topics. Obviously, that include some history of RISC vs. CISC, DSP, VLIW, ...

3. Gray Codes (Part 2)
(MyBlog/TB-Articles)

The term Gray code is typically used to refer to a binary sequence in which only a single bit changes value when transitioning between adjacent states. In this, the second installment of our mini-series, ...

4. Synopsys and CoWare tie the knot. Virtual Prototyping on fire!!
(MyBlog/TB-Blog)

... Synopsys now has a major integration effort ahead of them in both the ESL space and the DSP tool space. --------------------------------------------- Brian Bailey – keeping you covered  ...

5. Analysis: M14K and M14Kc MCU cores
(MyBlog/TB-Reviews)

... the M4K because it offered the best combination of power, performance, interrupt capabilities, code density, and potential future customizations. (See Inside DSP for details.)  These attributes have only ...

6. Blackfin FMC board runs Microsoft .NET Micro Framework
(MyBlog/TB-Blog)

...  400 MHz ADSP-BF518F Blackfin processor 64 MB Micron PC-133 SDRAM 4 MB Numonyx parallel NOR Flash 4 Mb SPI Flash (internal to CPU) 10/100 Ethernet with IEEE 1588 support SD/MMC card slot One RS-232 ...

7. LFSRs (Part 2)
(MyBlog/TB-Articles)

An LFSR is a shift register whose output is cunningly manipulated and fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns. In this, the second ...

8. An Introduction to Software-Defined Radio (SDR)
(MyBlog/TB-Articles)

... Digital Signal Processing (DSP) chips to traditional analog radio architectures to provide signal-processing functions with limited or no capability to upgrade. SDR is an alternative radio communication ...

9. Say goodbye to the 3 V’s of virtual prototyping
(MyBlog/TB-Blog)

... suppliers has yet to show a presence in this market. It was only a few years back that Cadence turned some of their DSP and ESL software over to CoWare – maybe the time is getting right for them to take ...

10. How to Add Content (Blogs, Articles, etc.) to the TechBites Site (v2)
(MyBlog/TB-Articles)

... your content items to appear in one or more of the TechBites Communities (Automotive, DSP, Video...) then you must first become a member of those communities. Simply visit the communities of interest and ...

11. Cool Beans: Using Skype for screen sharing and other stuff
(MyBlog/TB-Blog)

... I am ... it simply hadn’t struck me that my PC has an inbuilt microphone and loudspeaker, which means I don’t need a headset at all – give me strength! (Actually a headset works much better, but it's nice ...

12. Creating an Open Source-based FPGA Design Flow
(MyBlog/TB-Articles)

... controllers, coprocessors, cryptography, DSP, forward error correction coding, and embedded microprocessors. Furthermore, OpenCores also stewards Wishbone, which is a standardized bus protocol for use ...

13. Xilinx launch New Connectivity, Embedded, and DSP Kits (Nitty-Gritty Details)
(MyBlog/TB-Articles)

... require high bandwidth communication channels to deal with large amounts of data. The trick is being able to tap into the inherent parallelism, integrated memory, DSP, and communication features of the ...

14. Solar PV Technology Update
(MyBlog/TB-Articles)

... utilization to very low levels.  Grid-tie inverter electronics with DSPs, integral anti-islanding & power disconnects, batteries and charge controllers are also benefiting from new nanotechnology materials ...

15. CEVA toolchain supports C-only DSP development
(MyBlog/TB-Reviews)

... assembly coding in many cases.  The improved C performance means that developers can look forward to a much shorter DSP software development cycle. The biggest upgrade in the toolchain is the new project ...

16. BDTi, Xilinx, AutoESL and Synfora dispel rumors about high-level synthesis
(MyBlog/TB-Articles)

... bottom line or not. Then we have to think about a completely different set of users as well. What about the software developers who have been using DSPs for years? They now face a migration to multi-processor ...

17. Tier Logic's 3D-FPGA technology = low-cost FPGAs and no-risk ASICs
(MyBlog/TB-Blog)

... because both the user logic (including look-up tables, registers, memory blocks, DSP blocks, etc.) and the configuration SRAM cells are created in the same silicon: The result is that a large proportion ...

18. LFSRs (Part 3)
(MyBlog/TB-Articles)

An LFSR is a shift register whose output is cunningly manipulated and fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns. In this, the third ...

19. ADI slashes SHARC cost and power, keeps the good stuff
(MyBlog/TB-Blog)

Analog Device’s latest SHARC DSPs combine big performance and on-chip memory with small prices and power numbers.  This unique combination makes the new ADSP-2148x and ADSP-2147x DSPs a compelling choice ...

20. Welcome to TechBites
(MyBlog/TB-Articles)

... to your profile but... personally I think it's useful to briefly summarize your areas of expertise and interest, and possibly your company affiliation; for example: "I'm an expert at implementing DSP algorithms ...