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1. (jCommunity Group) Tuesday, 31 December 2069 2. Processor Design: System-On-Chip Computing for ASICs and FPGAs (MyBlog/TB-Reviews) ... can implement familiar architectures or novelties of their own. This collection of papers presents a survey of processor design topics. Obviously, that include some history of RISC vs. CISC, DSP, VLIW, ... Friday, 18 September 2009 3. Gray Codes (Part 2) (MyBlog/TB-Articles) The term Gray code is typically used to refer to a binary sequence in which only a single bit changes value when transitioning between adjacent states. In this, the second installment of our mini-series, ... Sunday, 06 September 2009 4. Analysis: M14K and M14Kc MCU cores (MyBlog/TB-Reviews) ... the M4K because it offered the best combination of power, performance, interrupt capabilities, code density, and potential future customizations. (See Inside DSP for details.) These attributes have only ... Tuesday, 03 November 2009 5. How to Add Content (Blogs, Articles, etc.) to the TechBites Site (v2) (MyBlog/TB-Articles) ... your content items to appear in one or more of the TechBites Communities (Automotive, DSP, Video...) then you must first become a member of those communities. Simply visit the communities of interest and ... Thursday, 22 October 2009 6. LFSRs (Part 2) (MyBlog/TB-Articles) An LFSR is a shift register whose output is cunningly manipulated and fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns. In this, the second ... Sunday, 20 September 2009 7. Blackfin FMC board runs Microsoft .NET Micro Framework (MyBlog/TB-Blog) ... 400 MHz ADSP-BF518F Blackfin processor 64 MB Micron PC-133 SDRAM 4 MB Numonyx parallel NOR Flash 4 Mb SPI Flash (internal to CPU) 10/100 Ethernet with IEEE 1588 support SD/MMC card slot One RS-232 ... Tuesday, 10 November 2009 8. Synopsys and CoWare tie the knot. Virtual Prototyping on fire!! (MyBlog/TB-Blog) ... Synopsys now has a major integration effort ahead of them in both the ESL space and the DSP tool space. --------------------------------------------- Brian Bailey – keeping you covered ... Monday, 08 February 2010 9. Xilinx launch New Connectivity, Embedded, and DSP Kits (Nitty-Gritty Details) (MyBlog/TB-Articles) ... require high bandwidth communication channels to deal with large amounts of data. The trick is being able to tap into the inherent parallelism, integrated memory, DSP, and communication features of the ... Tuesday, 08 December 2009 10. CEVA toolchain supports C-only DSP development (MyBlog/TB-Reviews) ... assembly coding in many cases. The improved C performance means that developers can look forward to a much shorter DSP software development cycle. The biggest upgrade in the toolchain is the new project ... Sunday, 06 December 2009 11. Welcome to TechBites (MyBlog/TB-Articles) ... to your profile but... personally I think it's useful to briefly summarize your areas of expertise and interest, and possibly your company affiliation; for example: "I'm an expert at implementing DSP algorithms ... Wednesday, 11 November 2009 12. Creating an Open Source-based FPGA Design Flow (MyBlog/TB-Articles) ... controllers, coprocessors, cryptography, DSP, forward error correction coding, and embedded microprocessors. Furthermore, OpenCores also stewards Wishbone, which is a standardized bus protocol for use ... Tuesday, 05 January 2010 13. LFSRs (Part 3) (MyBlog/TB-Articles) An LFSR is a shift register whose output is cunningly manipulated and fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns. In this, the third ... Sunday, 20 September 2009 14. Say goodbye to the 3 V’s of virtual prototyping (MyBlog/TB-Blog) ... suppliers has yet to show a presence in this market. It was only a few years back that Cadence turned some of their DSP and ESL software over to CoWare – maybe the time is getting right for them to take ... Friday, 05 February 2010 15. BDTi, Xilinx, AutoESL and Synfora dispel rumors about high-level synthesis (MyBlog/TB-Articles) ... bottom line or not. Then we have to think about a completely different set of users as well. What about the software developers who have been using DSPs for years? They now face a migration to multi-processor ... Monday, 18 January 2010 16. New MIPS uC Cores – 32-bit Performance / 16-bit Code Size (MyBlog/TB-Blog) ... including MIPS-3D ASE, MIPS DSP ASE, MIPS MT ASE and SmartMIPS ASE, as well as new instructions for advanced code size reduction. The microMIPS ISA is backward compatible, enabling reuse of optimized MIPS ... Monday, 02 November 2009 17. LFSRs (Part 1) (MyBlog/TB-Articles) An LFSR is a shift register whose output is cunningly manipulated and fed back into its input in such a way as to cause the function to endlessly cycle through a sequence of patterns. In this, the first ... Sunday, 20 September 2009 18. Avnet kit lets you do FPGA design without RTL (MyBlog/TB-Blog) I’m happy with what I’m seeing in Avnet’s new Virtex-6 FPGA DSP Kit. This kit is designed to give let you start doing DSP design without needing any FPGA expertise, and I think it meets that goal. The ... Wednesday, 10 February 2010 19. Xilinx launch New Connectivity, Embedded, and DSP Kits (Overview) (MyBlog/TB-Blog) ... consumption during system-on-chip (SoC) development. Xilinx Virtex-6 FPGA ML605 and Spartan-6 FPGA SP605 development boards The new kits target embedded processing, DSP and the building of systems that ... Tuesday, 08 December 2009 20. Goldilocks and the three DSPs: when and why to use Target's ASIP tools (MyBlog/TB-Articles) ... and the three bears? Papa bear’s porridge was too hot, and mama bear’s porridge was too cold. Goldilocks needed a third, in-between option… and baby bear’s porridge was just right! Sometimes DSP hardware ... Friday, 20 November 2009
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